Saturday, May 16, 2009

The F-14A “Tom Cat” Microprocessor

Designed and Developed 1968-1970. This site describes the design work for a MOS-LSI microprocessor chip set designed starting June 1968 and completed by June 1970. This highly integrated computer chip set was designed for the US Navy F14A “TomCat” fighter jet by Mr. Steve Geller and Mr. Ray Holt while working for Garrett AiResearch Corp under contract from Grumman Aircraft, the prime contractor for the US Navy. The MOS-LSI chips were manufactured by American Microsystems, Inc of Santa Clara, California.

The MOS-LSI chip set was part of the Central Air Data Computer (CADC) which had the function of controlling the moving surfaces of the aircraft and the displaying of pilot information. The CADC received input from five sources, 1) static pressure sensor, dynamic pressure sensor, analog pilot information, temperature probe, and digital switch pilot input. The output of the CADC controlled the moving surfaces of the aircraft. These were the wings, maneuver flaps, and the glove vane controls. The CADC also controlled four cockpit displays for, Mach Speed, Altitude, Air Speed, and Vertical Speed. The CADC was a redundant system with real-time self-testing built-in. Any single failure from one system would switch over to the other.

Two state-of-the-art quartz sensors, a 20-bit high precision analog-to-digital converter, a 20-bit high precision digital-to-analog converter, the MOS-LSI chip set, and a very efficient power unit made up the complete CADC. A team of over 25 managers, engineers, programmers, and technicians from AiResearch and American Microsystems labored for three years to accomplish a design feat never before attempted, a complete state-of-the-art, highly integrated, digital air data computer. Previous designs were based around mechanical technology, consisting of precision gears and cams.

In 1971, Mr. Ray Holt wrote a design paper on the MOS-LSI chip set design which was approved for publication by Computer Design magazine. However, because of national security reasons the U.S. Navy would not approve this paper for publication. Mr. Holt attempted again in 1985 to have the paper cleared and the answer again was no. Finally, in April 1997, he started the process again and this time was able to receive clearance for publication as of April 21, 1998.

The entire contents of this original 1971 paper, “Architecture Of A Microprocessor“, is made available here. The first public announcement of the F14A MOS-LSI microprocessor chip set was a published article by the Wall Street Journal on September 22, 1998. This paper and the details of the design were first presented publicly by Mr. Ray Holt at the Vintage Computer Festival held at the Santa Clara Convention Center on September 26-27, 1998.

Many thanks to Mr. Sam Ismail of the Vintage Computer Festival for, not only his believability of this design, but for his hard work in making it a significant announcement in the microprocessor world.

The F-14A “Tom Cat” Microprocessor


Designed and Developed 1968-1970. This site describes the design work for a MOS-LSI microprocessor chip set designed starting June 1968 and completed by June 1970. This highly integrated computer chip set was designed for the US Navy F14A “TomCat” fighter jet by Mr. Steve Geller and Mr. Ray Holt while working for Garrett AiResearch Corp under contract from Grumman Aircraft, the prime contractor for the US Navy. The MOS-LSI chips were manufactured by American Microsystems, Inc of Santa Clara, California.

The MOS-LSI chip set was part of the Central Air Data Computer (CADC) which had the function of controlling the moving surfaces of the aircraft and the displaying of pilot information. The CADC received input from five sources, 1) static pressure sensor, dynamic pressure sensor, analog pilot information, temperature probe, and digital switch pilot input. The output of the CADC controlled the moving surfaces of the aircraft. These were the wings, maneuver flaps, and the glove vane controls. The CADC also controlled four cockpit displays for, Mach Speed, Altitude, Air Speed, and Vertical Speed. The CADC was a redundant system with real-time self-testing built-in. Any single failure from one system would switch over to the other.

Two state-of-the-art quartz sensors, a 20-bit high precision analog-to-digital converter, a 20-bit high precision digital-to-analog converter, the MOS-LSI chip set, and a very efficient power unit made up the complete CADC. A team of over 25 managers, engineers, programmers, and technicians from AiResearch and American Microsystems labored for three years to accomplish a design feat never before attempted, a complete state-of-the-art, highly integrated, digital air data computer. Previous designs were based around mechanical technology, consisting of precision gears and cams.

In 1971, Mr. Ray Holt wrote a design paper on the MOS-LSI chip set design which was approved for publication by Computer Design magazine. However, because of national security reasons the U.S. Navy would not approve this paper for publication. Mr. Holt attempted again in 1985 to have the paper cleared and the answer again was no. Finally, in April 1997, he started the process again and this time was able to receive clearance for publication as of April 21, 1998.

The entire contents of this original 1971 paper, “Architecture Of A Microprocessor“, is made available here. The first public announcement of the F14A MOS-LSI microprocessor chip set was a published article by the Wall Street Journal on September 22, 1998. This paper and the details of the design were first presented publicly by Mr. Ray Holt at the Vintage Computer Festival held at the Santa Clara Convention Center on September 26-27, 1998.

Many thanks to Mr. Sam Ismail of the Vintage Computer Festival for, not only his believability of this design, but for his hard work in making it a significant announcement in the microprocessor world.

Friday, May 15, 2009

Microprocessors - History and Technology

Microprocessors - History and Technology
How Microprocessors Work
From Intel's educational program.

The History of the Microcomputer - Invention and Evolution
Intel's founder, Robert Noyce, chartered Ted Hoff's Applications Research Department in 1969 to find new applications for silicon technology -the microcomputer was the result - written by Stanley Mazor.

Chronology of Events in the History of Microcomputers
Timeline maintained by Copyright (C) 1994-98 Ken Polsson.

Processing Power
Computers have changed in their ability in one simple dimension. They've become faster, and in a very predictable manner. The number of devices of a chip - that is the circuit elements in a logic circuit - Gordon Moore predicted with incredible perspicacity in 1965 to double every 18 months.

Intel's Processors Hall of Fame
Find fast facts about Intel's family of microprocessors from the 4004 chip to the Pentium® II processor. Intel's first money making product, was the 3101 Schottky bipolar 64-bit static random access memory (SRAM) chip.

Moore's Law
The origin, nature, and implications of Moore's Law. The benchmark of progress in the semiconductor electronics.



Federico Faggin, Stanley Mazor and Ted Hoff
Federico Faggin
Microprocessor Concept and Architecture Patent No.: 3,821,715 - National Inventors Hall of Fame. Federico Faggin, currently CEO of Synaptics, led the design and development of the world's first microprocessor, the Intel 4004 and conceived and supervised the design of the landmark 8080, the first modern microprocessor. Stanley Mazor - The History of the Microcomputer - Invention and Evolution
Intel's founder, Robert Noyce, chartered Ted Hoff's Applications Research Department in 1969 to find new applications for silicon technology -the microcomputer was the result.

Article by Federico Faggin - The Future of the Microprocessor



Gordon Moore and Bob Noyce
Moore is widely known for "Moore's Law," in which he predicted that the number of transistors the industry would be able to place on a computer chip would double every year. In 1995, he updated his prediction to once every two years. While originally intended as a rule of thumb in 1965, it has become the guiding principle for the industry to deliver ever-more-powerful semiconductor chips at proportionate decreases in cost.

Moore earned a B.S. in Chemistry from the University of California at Berkeley and a Ph.D. in Chemistry and Physics from the California Institute of Technology. He was born in San Francisco, Calif., on Jan. 3, 1929.

Another Interview with Gordon Moore
Interview by Jill Wolfson, San Jose Mercury News; and Teo Cervantes, James Lick High School.

Intel
The History of Intel: Intel's 30th Anniversary
The history of Intel and thirty years of innovation.

The History of Intel
The two founders decided upon the name "Intel" for their new company, a shortened version of "integrated electronics".


Fascinating facts about the invention

When it first started in the mid-sixties, Intel produced electronic memory components. Ted Hoff was employee number 12 at the company assigned to work with minicomputers and in June, 1968, he was asked to liaison with a group of Japanese engineers from a company called Busicom. They'd approached Intel with a design for a small calculator--a design which called for 12 different semiconductor-based custom chips to handle various of its functions. Hoff says he looked at the design and struggled with it for a while, but eventually decided there had to be a better way.
He felt that programming through read-only memory and general-purpose registers could replace the separate (i.e., discrete) components the Busicom engineers had requested. When he presented his idea to Intel's then chairman, Robert Noyce, the boss was enthusiastic. But when the design was presented to Busicom's engineers, it almost died right there. They didn't want to change their design, but we were able to convince them to allow us to make a pitch directly to the owners of the company. We held an off-site meeting in October. Their engineers made their pitch and we made ours. Busicom's management bought ours.

It took another nine months before a team of Intel engineers, led by Frederico Faggin, could turn Hoff's ideas into hardware. The original 4004 was a silicon-based chip measuring 1/8th of an inch long by 1/16th of an inch wide, containing either 2,108 or 2,300 transistors (it depends on who you ask--Hoff's count is 2,108 but, he says, Faggin included 192 "virtual transistors" in his count). It had about the same amount of computing power as the original ENIAC which weighed 30 tons, occupied 3,000 cubic feet of space and used 18,000 vacuum tubes.

It didn't take Intel long to discover it had something here. The only problem was that the company didn't have it. The 4004 belonged to Busicom (which was also sometimes known as Nippon Calculator). Noyce and his crew flew to Japan and bought back the rights for $60,000. A short time later, Busicom went bankrupt.

"The first microprocessors were industrial controllers," says Hoff. No one really thought of using them in computers. Instead, they wound up as embedded controllers in things like automated gas pumps, traffic controllers and manufacturing pressure and flow meters." In the 1970s refinements in integrated circuit technology led to the development of the modern microprocessor, integrated circuits that contained thousands of transistors. Modern microprocessors contain millions.

Dr. Ted Hoff doesn't work for Intel any more. After a brief stint at Atari, he's become chief technical officer and a consultant for a small California firm called Teklicon, specializing in patent research. He says he couldn't have anticipated what his microprocessor would become and there have been surprises--such as the amount of progress in miniaturization that has occurred (the first 4004 used gateways 10 microns wide compared to today's .35 microns). But he's even more delighted over the social impact microcomputers have had and continue to have.

Where are we now? The 2000s

The 2000s have come along and it's too early yet to say what will have happened by decade's end. As Federico Faggin said, the exponential progression of Moore's law cannot continue forever. As the day nears when process will be measured in Angstroms instead of nanometers, researchers are furiously experimenting with layout, materials, concepts, and process. After all, today's microprocessors are based on the same architecture and processes that were first invented 30 years ago -- something has definitely got to give.

We are not at the end of the decade yet, but from where we sit at its mid-way point, the major players are few, and can easily be arranged on a pretty small scorecard:

In high-end UNIX, DEC has phased out Alpha, SGI uses Intel, and Sun is planning to outsource production of SPARC to Fujitsu (IBM continues to make its own chips). RISC is still king, but its MIPS and ARM variants are found mostly in embedded systems.

In 64-bit desktop computing, the DEC Alpha is being phased out, and HP just ended its Itanium alliance with Intel. The AMD 64 (and its clones) and the IBM PowerPC are the major players, while in the desktop arena as a whole, Intel, AMD, and VIA make x86-compatible processors along RISC lines.

As for 2005 and beyond, the second half of the decade is sure to bring as many surprises as the first. Maybe you have ideas as to what they might be! Take this month's chips challenge, and let us know your predictions for chips in 2005.

The history of microprocessors is a robust topic -- this article hasn't covered everything, and we apologize for any omissions. Please e-mail the Power Architecture editors with any corrections or additions to the information provided here.


Resources

A new hope: The 1990s

The 1990s dawned just a few months after most of the Communist governments of Eastern and Central Europe had rolled over and played dead; by 1991, the Cold War was officially at an end. Those high-end UNIX workstation vendors who were left standing after the "microprocessor wars" scrambled to find new, non-military markets for their wares. Luckily, the commercialization and broad adoption of the Internet in the 1990s neatly stepped in to fill the gap. For at the beginning of that decade, you couldn't run an Internet server or even properly connect to the Internet on anything but UNIX. A side effect of this was that a large number of new people were introduced to the open-standards Free Software that ran the Internet.

The popularization of the Internet led to higher desktop sales as well, fueling growth in that sector. Throughout the 1990s, desktop chipmakers participated in a mad speed race to keep up with "Moore's Law" -- often neglecting other areas of their chips' architecture to pursue elusive clock rate milestones.

32-bitness, so coveted in the 1980s, gave way to 64-bitness. The first high-end UNIX processors would blazon the 64-bit trail at the very start of the 1990s, and by the time of this writing, most desktop systems had joined them. The POWER™ and PowerPC family, introduced in 1990, had a 64-bit ISA from the beginning.

Power Architecture

IBM introduced the POWER architecture -- a multichip RISC design -- in early 1990. By the next year, the first single-chip PowerPC derivatives (the product of the Apple-IBM-Motorola AIM alliance) were available as a high-volume alternative to the predominating CISC desktop structure.

Where is Power Architecture technology now?
Power Architecture technology is popular in all markets, from the high-end UNIX eServer™ to embedded systems. When used on the desktop, it is often known as the Apple G5. The cooperative climate of the original AIM alliance has been expanded into an organization by name of Power.org.

DEC Alpha

In 1992, DEC introduced the Alpha 21064 at a speed of 200MHz. The superscalar, superpipelined 64-bit processor design was pure RISC, but it outperformed the other chips and was referred to by DEC as the world's fastest processor. (When the Pentium was launched the next spring, it only ran at 66MHz.) The Alpha too was intended to be used in both UNIX server/workstations as well as desktop variants.

The primary contribution of the Alpha design to microprocessor history was not in its architecture -- that was pure RISC. The Alpha's performance was due to excellent implementation. The microchip design process is dominated by automated logic synthesis flows. To deal with the extremely complex VAX architecture, Digital designers applied human, individually crafted attention to circuit design. When this was applied to a simple, clean architecture like the RISC-based Alpha, the combination gleaned the highest possible performance.

Where is Alpha now?
Sadly, the very thing that led Alpha down the primrose path -- hand-tuned circuits -- would prove to be its undoing. As DEC was going out of business, , its chip division, Digital Semiconductor, was sold to Intel as part of a legal settlement. Intel used the StrongARM (a joint project of DEC and ARM) to replace its i860 and i960 line of RISC processors.

The Clone Wars begin

In March 1991, Advanced Micro Devices (AMD) introduced its clone of Intel's i386DX. It ran at clock speeds of up to 40MHz. This set a precedent for AMD -- its goal was not just cheaper chips that would run code intended for Intel-based systems, but chips that would also outperform the competition. AMD chips are RISC designs internally; they convert the Intel instructions to appropriate internal operations before execution.

Also in 1991, litigation between AMD and Intel was finally settled in favor of AMD, leading to a flood of clonemakers -- among them, Cyrix, NexGen, and others -- few of which would survive into the next decade.

In the desktop space, Moore's Law turned into a Sisyphean treadmill as makers chased elusive clock speed milestones.

Where are they now?
Well, of course, AMD is still standing. In fact, its latest designs are being cloned by Intel!

Cyrix was acquired by National Semiconductor in 1997, and sold to VIA in 1999. The acquisition turned VIA into a processor player, where it had mainly offered core logic chipsets before. The company today specializes in high-performance, low-power chips for the mobile market.


CISC

CISC was a retroactive term. It was coined and applied to processors after the fact, in order to distinguish traditional CPUs from the new RISC designs. Then in 1993, Intel introduced the Pentium, which was a pipelined, in-order superscalar architecture. It was also backwards-compatible with the older x86 architecture and was thus almost a "hybrid" chip -- a blend of RISC and CISC design ideas. Later, the Pentium Pro included out-of-order code execution and branch prediction logic, another typically RISC concept.

The dawning of the age of RISC: The 1980s


Advances in process ushered in the "more is more" era of VLSI, leading to true 32-bit architectures. At the same time, the "less is more" RISC philosophy allowed for greater performance. When combined, VLSI and RISC produced chips with awesome capabilities, giving rise to the UNIX® workstation market.

The decade opened with intriguing contemporaneous independent projects at Berkeley and Stanford -- RISC and MIPS. Even with the new RISC families, an industry shakeout commonly referred to as "the microprocessor wars," would mean that we left the 1980s with fewer major micro manufacturers than we had coming in.

By the end of the decade, prices had dropped substantially, so that record numbers of households and schools had access to more computers than ever before.

RISC and MIPS and POWER

RISC, too, started in many places at once, and was antedated by some of the examples already cited (see the sidebar, The evolution of RISC).

Berkeley RISC
In 1980, the University of California at Berkeley started something it called the RISC Project (in fact, the professors leading the project, David Patterson and Carlo H. Sequin, are credited with coining the term "RISC").

The project emphasized pipelining and the use of register windows: by 1982, they had delivered their first processor, called the RISC-I. With only 44KB transistors (compared with about 100KB in most contemporary processors) and only 32 instructions, it outperformed any other single chip design in existence.

MIPS
Meanwhile, in 1981, and just across the San Francisco Bay from Berkeley, John Hennessy and a team at Stanford University started building what would become the first MIPS processor. They wanted to use deep instruction pipelines -- a difficult-to-implement practice -- to increase performance. A major obstacle to pipelining was that it required the hard-to-set-up interlocks in place to ascertain that multiple-clock-cycle instructions would stop the pipeline from loading data until the instruction was completed. The MIPS design settled on a relatively simple demand to eliminate interlocking -- all instructions must take only one clock cycle. This was a potentially useful alteration in the RISC philosophy.

POWER
Also contemporaneously and independently, IBM continued to work on RISC as well. 1974's 801 project turned into Project America and Project Cheetah. Project Cheetah would become the first workstation to use a RISC chip, in 1986: the PC/RT, which used the 801-inspired ROMP chip.

Where are they now?
By 1983, the RISC Project at Berkeley had produced the RISC-II which contained 39 instructions and ran more than 3 times as fast as the RISC-I. Sun Microsystem's SPARC (Scalable Processor ARChitecture) chip design is heavily influenced by the minimalist RISC Project designs of the RISC-I and -II.

Professors Patterson and Sequin are both still at Berkeley.

MIPS was used in Silicon Graphics workstations for years. Although SGI's newest offerings now use Intel processors, MIPS is very popular in embedded applications.

Professor Hennessy left Stanford in 1984 to form MIPS Computers. The company's commercial 32-bit designs implemented the interlocks in hardware. MIPS was purchased by Silicon Graphics, Inc. in 1992, and was spun off as MIPS Technologies, Inc. in 1998. John Hennessy is currently Stanford University's tenth President.

IBM's Cheetah project, which developed into the PC-RT's ROMP, was a bit of a flop, but Project America was in prototype by 1985 and would, in 1990, become RISC System/6000. Its processor would be renamed the POWER1.

RISC was quickly adopted in the industry, and today remains the most popular architecture for processors. During the 1980s, several additional RISC families were launched. Aside from those already mentioned above were:

  • CRISP (C Reduced Instruction Set Processor) from AT&T Bell Labs.
  • The Motorola 88000 family.
  • Digital Equipment Corporation Alpha's (the world's first single-chip 64-bit microprocessor).
  • HP Precision Architecture (HP PA-RISC).

32-bitness

The early 1980s also saw the first 32-bit chips arrive in droves.

BELLMAC-32A
AT&T's Computer Systems division opened its doors in 1980, and by 1981 it had introduced the world's first single-chip 32-bit microprocessor, the AT&T Bell Labs' BELLMAC-32A, (it was renamed the WE 32000 after the break-up in 1984). There were two subsequent generations, the WE 32100 and WE 32200, which were used in:

  • the 3B5 and 3B15 minicomputers
  • the 3B2, the world's first desktop supermicrocomputer
  • the "Companion", the world's first 32-bit laptop computer
  • "Alexander", the world's first book-sized supermicrocomputer

All ran the original Bell Labs UNIX.

Motorola 68010 (and friends)
Motorola had already introduced the MC 68000, which had a 32-bit architecture internally, but a 16-bit pinout externally. It introduced its pure 32-bit microprocessors, the MC 68010, 68012, and 68020 by 1985 or thereabouts, and began to work on a 32-bit family of RISC processors, named 88000.

NS 32032
In 1983, National Semiconductor introduced a 16-bit pinout, 32-bit internal microprocessor called the NS 16032, the full 32-bit NS 32032, and a line of 32-bit industrial OEM microcomputers. Sequent also introduced the first symmetric multiprocessor (SMP) server-class computer using the NS 32032.

Intel entered the 32-bit world in 1981, same as the AT&T BELLMAC chips, with the ill-fated 432. It was a three-chip design rather than a single-chip implementation, and it didn't go anywhere. In 1986, its 32-bit i386 became its first single-chip 32-bit offering, closely followed by the 486 in 1989.

Where are they now?
AT&T closed its Computer Systems division in December, 1995. The company shifted to MIPS and Intel chips.

Sequent's SMP machine faded away, and that company also switched to Intel microprocessors.

The Motorola 88000 design wasn't commercially available until 1990, and was cancelled soon after in favor of Motorola's deal with IBM and Apple to create the first PowerPC.

ARM is born

In 1983, Acorn Computers Ltd. was looking for a processor. Some say that Acorn was refused access to Intel's upcoming 80286 chip, others say that Acorn rejected both the Intel 286 and the Motorola MC 68000 as being not powerful enough. In any case, the company decided to develop its own processor called the Acorn RISC Machine, or ARM. The company had development samples, known as the ARM I by 1985; production models (ARM II) were ready by the following year. The original ARM chip contained only 30,000 transistors.

Where are they now?
Acorn Computers was taken over by Olivetti in 1985, and after a few more shakeups, was purchased by Broadcom in 2000.

However, the company's ARM architecture today accounts for approximately 75% of all 32-bit embedded processors. The most successful implementation has been the ARM7TDMI with hundreds of millions sold in cellular phones. The Digital/ARM combo StrongARM is the basis for the Intel XScale processor.